INTID=RESERVED, INTSTATUS=INTERRUPT_PENDING
Interrupt ID Register. Identifies which interrupt(s) are pending.
| INTSTATUS | Interrupt status. Note that IIR[0] is active low. The pending interrupt can be determined by evaluating IIR[3:1]. 0 (INTERRUPT_PENDING): Interrupt pending. At least one interrupt is pending. 1 (NOT_PENDING): Not pending. No interrupt is pending. |
| INTID | Interrupt identification. IER[3:1] identifies an interrupt corresponding to the USART Rx FIFO. All other combinations of IER[3:1] not listed below are reserved (100,101,111). 0 (RESERVED): Reserved. Priority 4 (lowest) - Reserved. 1 (THRE): THRE. Priority 3 - THRE Interrupt. 2 (RDA): RDA. Priority 2 - Receive Data Available (RDA). 3 (RLS): RLS. Priority 1 (highest). (Highest) Receive Line Status (RLS). 6 (CTI): CTI. Priority 2 - Character Time-out Indicator (CTI). |
| RESERVED | Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined. |
| FIFOENABLE | Copies of FCR[0]. |
| ABEOINT | End of auto-baud interrupt. True if auto-baud has finished successfully and interrupt is enabled. |
| ABTOINT | Auto-baud time-out interrupt. True if auto-baud has timed out and interrupt is enabled. |
| RESERVED | Reserved, user software should not write ones to reserved bits. The value read from a reserved bit is not defined. |